Firmware Recovery Switch
The firmware recovery switch is implemented with a 3-pin 1-row header and a jumper. The jumper has two positions: normal and recovery.
Normal position
At the next power ON, the latest firmware successfully written into the Flash EEPROM is used to program the FPGA.
After FPGA startup completion, the card exhibits the standard PCI ID and the Coaxlink driver allows normal operation.
This is the factory default jumper position.
Recovery position
At the next power ON, the last but one firmware successfully written into the Flash EEPROM is used to program the FPGA.
After FPGA startup completion, the card exhibits the recovery PCI ID and the Coaxlink driver inhibits image acquisition.
Location on PCI Express cards
Firmware Recovery Switch location of
Firmware Recovery Switch location of
Firmware Recovery Switch location of
Note: The normal position of the jumper (i.e. bracket side) is common to all Coaxlink PCI Express cards.