FFC in Coaxlink frame grabbers
Some cameras have a built-in FFC module while other cameras do not implement this feature. The devices without that functionality can however be corrected by the FFC core of the frame grabber.
The FFC core firmware corrects the pixels directly coming from the camera by applying the FFC using the coefficients (Offset and Gain) corresponding to their locations in the image. Because the correction happens at a very early stage in the pixel processing chain, the other pixel processing functions such as RedBlueSwap, LUT, and Bayer Decoding are performed on corrected pixels.
Gain and Offset Coefficients Format
The coefficients calculated in the calibration procedure can be loaded into the frame grabber, provided they are encoded as follows:
| ● | Offset and Gain values for one pixel component are packed together into a 16-bit little-endian value: |
| □ | Gain is encoded in Wikipedia:UQ2.8 on bits 9..0 |
| □ | Offset is a 6-bit unsigned integer on bits 15..10 |
| ● | Coefficients related to pixel component values are treated separately in the same sequence as the pixel components of the image. For example in RGB8 format, one pixel is encoded as 3 successive 8-bit values (Red, Green, Blue), therefore we need 3 successive 16-bit packed coefficients to correct one RGB8 pixel. |
If the 16-bit packed coefficients are stored (in sequence) in a binary file (let's say 'path/to/coefficients.ffc'), they can be easily loaded from a Euresys script by calling
require("coaxlink://ffc/load")(grabber, 'path/to/coefficients.ffc');where
grabber is the script variable referencing the grabber to configure.
| NOTE: | such a binary file can be created by the Euresys ffc-wizard sample application. |
Specifications
Camera Types
The FFC feature is applicable to monochrome, Bayer CFA and RGB Color area-scan cameras delivering 8-, 10-, 12- 14- or 16-bit data per pixel component.
Maximum Image Size
The maximum size is determined by the size of the memory used to store FFC coefficients and the pixel format:
|
Size |
Maximum Image size [Pixels] |
||
|---|---|---|---|
| Monochrome and Bayer CFA | RGB | RGBa | |
| 32 KB | 16,384 | 5,461 | 4,096 |
| 512 MB | 268,435,456 | 89,478,485 | 67,108,864 |
| 1024 MB | 536,870,912 | 178,956,970 | 134,217,728 |
| 2048 MB | 1,073,741,824 | 357,913,941 | 268,435,456 |
The location and the size of the FFC coefficients storage are determined by the product/firmware variant combination:
| Product/firmware-variant |
Location (Partition scheme) |
Size |
|---|---|---|
| 1633 Coaxlink Quad G3 (1-camera, line-scan) 1633-LH Coaxlink Quad G3 LH (1-camera, line-scan) |
FPGA memory | 32 KB |
| 1635 Coaxlink Quad G3 DF
(1-camera, line-scan) and (1-df-camera, line-scan ) |
||
| 1633 Coaxlink Quad G3 (1-camera), (1-camera, line-scan) 1633-LH Coaxlink Quad G3 LH |
DRAM memory |
512 MB |
| 3603 Coaxlink Quad CXP-12 (1-camera) | 1024 MB | |
| 3603-4 Coaxlink Quad CXP-12 (1-camera) | 2048 MB | |
| 3623 Coaxlink Quad CXP-12 Value (1-camera) | 2048 MB | |
| 3602 Coaxlink Octo (2-camera) |
DRAM memory |
512 MB |
For most product/firmware-variants, FFC coefficients are stored in a dedicated partition of the on-board DRAM memory.
However, for the line-scan firmware variants of 1633 Coaxlink Quad G3, 1633-LH Coaxlink Quad G3 LH and 1635 Coaxlink Quad G3 DF, the FFC coefficients are stored into internal FPGA memory blocks. This allows the FIFO buffer to work at full performance when the FFC is enabled.
Performance
When enabled, the FFC feature adds a significant load to the one-board memory since it fetches an additional 16-bit coefficient data for each processed pixel. When the FFC is enabled, the frame grabber is only able to sustain a fraction of the maximum data rate achievable by the CoaXPress Link. This dimension-less value is named "Sustainable relative data rate"
The following table shows the sustainable relative data rate for all bit depths and product/firmware variant combinations supporting FFC.
Sustainable Relative Data Rate
| Bit depth | Sustainable Relative Data Rate [% of a 4-lane CXP-6 maximum data rate] | |
|---|---|---|
| 1633 Coaxlink Quad G3 (1-camera) 1633-LH Coaxlink Quad G3 LH (1-camera) |
3602 Coaxlink Octo (2-camera) 3603 Coaxlink Quad CXP-12 (1-camera) 3603-4 Coaxlink Quad CXP-12 (1-camera) |
|
| 8-bit | 70.0 % | 123.2 % |
| 10-bit | 77.8 % | 136.9 % |
| 12-bit | 84.0 % | 147.8 % |
| 14-bit | 89.1 % | 156.8 % |
| 16-bit | 93.3 % | 164.3 % |
The "Sustainable Relative Data Rate" is global for all cameras attached to a board.For instance, in the 3602 Coaxlink Octo - 2-camera 8-bit use case, the sustainable data rate of 123.2% can be split unequally to 100% for a camera and 23.2% for the other camera.
Coaxlink and Grablink Duo frame grabbers do not acquire any data during blanking intervals. Line- and frame-blanking intervals do not consume memory bandwidth and therefore must be excluded in the calculation of the camera data rate.
To avoid latencies, FIFO buffer overflow and loss of frames, Euresys recommends to limit the (global) camera data rate accordingly.
Enabling the FFC
In the Data Stream module, set the FfcControl feature value to Enable.
Disabling the FFC
In the Data Stream module, set the FfcControl feature value to Disable.