4-lane Rev 3.0 PCIe end-point

Applies to Closed1633 Coaxlink Quad G3, 1633-LH Coaxlink Quad G3 LH, 1635 Coaxlink Quad G3 DF, 3621 Coaxlink Mono CXP-12, 3621-LH Coaxlink Mono CXP-12 LH, 3622 Coaxlink Duo CXP-12 and 3622-LH Coaxlink Duo CXP-12 LH.

The PCI Express Interface implements a PCIe end-point interface and provides electrical power to the on-board circuits.

The 4-lane Rev 3.0 PCIe end-point:

● complies with Revision 3.0 of the PCI Express Card Electromechanical specification,
● supports 1-lane, 2-lane, and 4-lane link width,
● supports PCIe Rev 3.0 link speed (8.0 GT/s with 128b/130b coding),
● supports PCIe Rev 2.0 link speed (5.0 GT/s with 8b/10b coding),
● doesn't support the PCIe Rev 1.0 link speed (2.5 GT/s with 8b/10b coding),
● supports payload size up to 512 bytes,
● offers the optimal performance when it is configured for 4-lane PCIe Rev 3.0 link speed (8 GT/s).

4-lane Rev 3.0 PCIe end-point to PC memory data transfer performance

Parameter Conditions Min. Typ. Max. Unit
Sustainable output data rate 4-lane @ 8 GT/s (PCIe Rev 3.0)   3,350   MB/s
4-lane @ 5 GT/s (PCIe Rev 2.0)   1,700   MB/s

2-lane @ 8 GT/s (PCIe Rev 3.0)

   1,700   MB/s
2-lane @ 5 GT/s (PCIe Rev 2.0)   800   MB/s

1-lane @ 8 GT/s (PCIe Rev 3.0)

   800   MB/s