FIFO Buffer
The DRAM memory is entirely dedicated to the storage of image data. Its size is product-dependant.
| Product | DRAM Memory Size |
|---|---|
|
|
512 MB |
|
|
512 MB |
|
|
1 GB |
|
|
1 GB |
|
|
1 GB |
|
|
512 MB |
|
|
1 GB |
|
|
1 GB |
|
|
128 MB |
|
|
2 GB |
The DRAM memory is partitioned into independent FIFO buffers according to the number of devices and the number of streams. Refer to Firmware Variants per Product for the available buffer size per data stream and per device.
The buffer operates as a FIFO to decouple the CoaXPress data flow from the PCI Express data flow. It absorbs temporary dropouts of the PCI Express data flow ensuring a reliable CoaXPress data acquisition. It enables burst-mode CoaXPress data acquisition at the highest data rates regardless the limits of the PCI Express interface.
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