MultiCam Block Diagram

The figure below is the interconnected set of managers composing the MultiCam acquisition model.

On the top of the block diagram, the user application activates the channel by sending a “Set Active” event (SACT) to the activity manager. This is performed by setting the ChannelState parameter to ACTIVE. Once activated, the channel notifies the sequence manager by issuing a “Start of Channel Activity” event (SCA).

The sequence manager gets ready and waits for a “Trigger Event” (TE). The trigger event is generated by the trigger manager when a “Hardware Trigger” event (HTRG) occurs on a selected hardware line. The trigger manager can be configured to introduce some configurable delay on the HTRG event before generating the TE event.

Once triggered, the sequence manager generates the “Start of Acquisition Sequence” event (SAS) to notify the phase manager that the sequence is opened. The phase manager propagates the information by issuing the “Start of Acquisition Phase” event (SAP). The slice manager reacts to the SAP event by issuing a “Start of Acquisition Slice” event (SASL).

The camera manager reacts to each SASL event and performs an expose/readout cycle. The cycle is reported to the transfer manager by the “Expose Completed” event (XPC) and the “Readout Completed” event (ROC). The XPC event marks the end of the exposure and the ROC event marks the end of the readout period of the camera.

The ROC event occurs when the last pixel is issued by the camera. This does not mean that the image data are available for image analysing by the user application. Some time is required to transfer the data to the destination surface through the PCI bus. The transfer manager takes care of this delay and generates the “End of Acquisition Phase” event (EAP) and the “End of Acquisition Sequence” event (EAS) at the right time.

The EAP event notifies the user application that a surface has been filled and is ready for image analysing by the user application. The EAS event indicates that a full sequence has ended and the corresponding surfaces are filled with the sequence of acquired images.

The transfer delay does not degrade the system performances since a new phase can be restarted before the EAP event of the previous one has occurred. This phase overlapping is represented with parallelogram on the acquisition timing example in the next section.

The completion manager consists of several counters programmed to inform the other managers when the numbers of pre-programmed sequences, phases and slices have been reached.

The grabber manager is responsible to inform other managers of the hardware resources availability to serve a dedicated channel.